Record-breaking IBM chip uses trick to cram in 100 billion transistors
New Scientist 2026-06-25 11:00:54
Context: IBM has unveiled a record-breaking computer chip, the size of a fingernail, which packs nearly 100 billion transistors, thanks to a three-dimensional technique that stacks two layers of silicon chips. This innovation is expected to offer 70% higher energy efficiency and 50% higher performance than current leading chips. The technology is anticipated to be integrated into commercial devices within the next decade.
Key Facts
- IBM's prototype chip measures 10 millimeters by 15 millimeters and contains almost 100 billion transistors, nearly twice as many as the previous state-of-the-art chip.
- The company's "0.7-nanometre" technology uses a three-dimensional technique to stack two layers of silicon chips, producing all the necessary electrical connections between the layers without overheating.
- Huiming Bu at IBM states that the innovation, which took 15 years of development, enables transistor scaling in the Z direction, marking a significant shift from traditional scaling in the X and Y axes.
- The new chip technology is expected to be in commercial devices within 10 years, with IBM's 2-nanometre chip, announced in 2021, already being manufactured by leading chip foundries and expected to feature in the next Apple iPhone.
- Owen Guy at Swansea University notes that while other chip makers claim similar transistor density, they often use multiple layers of silicon separated by thick substrate layers, which can be problematic to cool and don't allow for true 3D design like IBM's technology.